How many address bits are needed for all of memory. The first two bytes of a 2m x 16 main memory have the following hex values. However, on a 16 bit cpu where a register can only hold 64k different addresses, you wouldnt likely do this. Like the previous memory, its a random access memory. Assignment 6 solutions caches alice liang june 4, 20 1 introduction to caches for a directmapped cache design with a 32bit address and byteaddressable memory, the following bits of the address are used to access the cache. Aug 11, 2016 suppose that a 2m 16 main memory is built using 256kb 8 ram chips and memory is wordaddressable. Suppose that a 2m 16 main memory is built using 256kb 8 ram chips and memory is wordaddressable a how many ram chips are necessary. Because the width of the memory chip is the same as that of the memory that is constructed, this interleaving is simple.
Suppose that a 16m x 16 main memory is built using 512kb x 8 ram chips and memory is word accessible. Place your name on each page of the test in the space provided. I know i can use 8 of the 16k x 1 chips to create a 16k x 8 chip. Also assume that its ok to alter x and y, we do not need them again. Suppose that a 2m x 16 main memory is built using 256k x 8 ram. The cache can accommodate a total of 2048 words from main memory.
How many bits are required to address a 1m x 8 main memory. Assuming that number of address lines address bits is n, how can we find n. Suppose that a 2m x 16 bits main memory is built using 256k x 8 ram chips and memory is wordaddressable. For the main memory addresses of f0010 and cabbe, give the. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to. Ram and loads it into the cache hierarchyassuming an inclusive. Iyigun an important issue in the construction and maintenance of information systems is the amount of storage required. The answer is, like in most cases located in the back of the text book, but i want to know how to work it out.
Main memory ram chips 2m x 16 256k x 8 16 ramchips b how. Memory is built from random access memory ram chips. Answers for question 7 suppose that a 2m x 16 main memory is built using 256k x 8 ram chips and memory is word. How many bits are required to address a 4m u 16 main memory if a. View chapter 4 exercises from csc 205 at thomas nelson community college. How many 256 x 8 ram chips are needed to provide a memory capacity of 4096 bytes. Memory memory structures are critical to any large, complex digital design.
Cse 30321 computer architecture i fall 2009 final exam. I dont know if i am asking the right questions here. Give any two main memory addresses with different tags that map to the same cache slot for a directmapped cache. There are 2m u 4 bytes which equals 2 u 220 u 22 223 total bytes, so 23 bits are needed for an address b. Assume a 256kx8 memory is to be designed using 16x1 ram. How many address bits are needed for each ram chip. For example, a 16bit computer that generates 16bit addresses is. Suppose that a 2m x 16 main memory is built using 256k x 8 ram chips. The instruction set consists of 250 different operations. An introduction to a simple computer, illustrates basic computer. In this paper, we describe a main memory hybrid database system called hyrise. Suppose that a 2m x 32 main memory is built using 256k. How many bits are required to address a 4m x 16 main memoryif.
Suppose the following program, written in the machine language of appendix c, is stored in main memory beginning at address 30 hexadecimal. Oct 31, 2012 suppose that a 16m x 16 main memory is built using 512kb x 8 ram chips and memory is word accessible. Suppose that a 2m x 16 main memory is built using 256k 8 ram. Suppose that a 2m x 16 main memory is built using 256k 8 ram chips and memory. You could buy four such chips and combine them to get something that works as if you had a 1m x 64 chip. Assume a 64k addressable memory, 16 bit data divided into 2 8bit transfers, 18 total control commands and the 1 interrupt signal. I suppose in the first sentence you meant ram chips are 16kx1, not 16x1. Suppose that a 2m x 16 main memory is built using 256k x 8 ram chips and memory iswordaddressable. Suppose the byte with address 0001 1010 0001 1010 is stored in the cache. How many bits are required to address a 4m x 16 main memory if.
Byte 0 is fe byte 1 is 01 if these bytes hold a 16 bit twos complement integer, what is its actual decimal value if. If highorder interleaving is used, then the first 256 k words will be found in bank 0. Since the process can fit exactly into 16 pages, there is no memory wasted by internal fragmentation. Suppose that a 2m x 16 main memory is built using 256k x 8 ram chips and memory is wordaddressable. Solved how many bits would you need to address a 2m 32. Answer to suppose that a 2m times 16 main memory is built using 256kb times 8. Answer to suppose that a 2m x 16 main memory is built using 256k x 8 ram chips and memory iswordaddressable. Oracle data sheet oracle database appliance x82s x82m. Pc ml instructions 30 2003 reg0 03 32 2101 reg1 01 34. Cda 3103 computer organization homework solution set 1 problems. Formulate all pertinent information required to construct the cache memory. Memory storage calculations professor jonathan eckstein adapted from a document due to m. The frequency of accesses to the memory by the cpu diminishes.
After discussing the organization, we shall present the advantages. Solved suppose that a 2m 16 main memory is built using. The first two bytes of a 1g x 16bit main memory have the following hex values. Comp 140 summer 2014 cache example index v tag data 000 y 10 mem0. Complete the following problems in the exercises section at the end of chapter 4. Some highend systems include l3 cache multilevel caches 42. How to construct a 64k x 8 memory chip using 16k x 1 memory. On the other hand, if the smallest addressable unit in this. Start studying exam 1 computer organization learn vocabulary, terms, and more with flashcards, games, and other study tools.
As noted above use high level language to calculate the values. Main memory these days most dram is also synchronous sdram. Main memory consists of 64mbyte 16 bytes 222 blocks. Assignment 6 solutions caches university of california. Assume that the size of each memory word is 1 byte. Suppose that a 1g x 32bit main memory is built using 256m x 4bit ram chips.
Computer organization and architecture semiconductor main memory. This handout presents basic concepts and calculations pertaining to the most common data types. Suppose that a 2m x 16 main memory is built using 256k. What is m referring to when talking about memory size 4m x 8. Hyrisea main memory hybrid storage engine vldb endowment.
A twoway set associative cache memory uses blocks of four words. It has a 2kbyte cache organized in a directmapped manner with 64 bytes per cache block. If highorder interleaving is used, then the first 256 k words will be. Suppose that a 2m x 16 main memory is built using 256k x 8 ram chips and memory is word addressable. Suppose that a 2m x 16 main memory is built using 256 x 8 ram chips and memory is wordaddressable. Suppose that a 2m x 16 main memory is built using 256k x 8. How many bits would you need to address a 2m x 32 memory if the memory is wordaddressable. Types of memory semiconducting main memory readwrite memory ram random access memory. Part 1 computer basics study guide nsu cset cs dept.
Lets assume 8 chips of 16kx1 capacity form one 16kx8 memory bank. Accepted answer 64 bit computing computer data storage scribd. How many bits are needed to address each single word in memory. A main memory block can be loaded into any line of cache memory address is interpreted as a tag and a word field tag field uniquely identifies a block of memory every lines tag is simultaneously examined for a match cache searching gets complex and expensive.
Each separate cpu address would refer to a different 2 bytes of memory, instead of discarding the low bit. For example, 4m x 8 means the memory is 4m long it has 4m 22 x 220 222 items and each item is 8 bits wide which means that each item is a byte. How many bits are needed to address this much memory. The book just told me that a word is typically in multiples of 8. If we were accessing one full word, how many chips would be involved. How many address bits are connected to the bank select decoder. Suppose that a 16m x 16 main memory is built using 512k x 8 ram chips and memory is word addressable. Store x input store y load x subt y skipcond 10 jump else load x store z jump next else. Suppose that a 2m times 16 main memory is built us. How many bits are required to address a 1m x 8 main memory if a main memory is byte addressable. Byte 0 is fe byte 1 is 01 if these bytes hold a 16bit twos complement integer, what is its actual decimal value if. Memory organization a suppose that a 32mb system memory is. My initial thought is that i would have 4 memory banks each containing 8 of the 16k x 1 chips, for a total of 32 chips. Banks and chips this lecture focuses on a standard arrangement for organizing memory into interleaved banks.
Computer organization chapter 4 flashcards quizlet. For the main memory addresses of f0010, 01234, and cabbe, give the corresponding tag, cache line address, and word offsets for a directmapped cache. The first two bytes of a 1m x 16 main memory have but. However i know that 1 byte 8 bits, so since there are 4 bytes and 1 byte 8 bytes, would it be correct to think that 4 bytes x. Directmap cache and set associative cache revision author.
Suppose a 2m x 16 main memory is built using 256k x 8 ram chips and memory is wordsaddressable. Memory is often referred to using the notation length x width l x w. Cse 30321 computer architecture i fall 2009 final exam december 18, 2009 test guidelines. Cpu loads mar and mdr, asserts write, and request 2. Suppose that a 16m x 16 main memory is built using 512k x 8 ram. To determine the block address of a byte address i, you can do the integer division i 2n our example has twobyte cache blocks, so we can think of a 16 byte main memory as an 8block main memory instead. Lets suppose we want to design a 64kbyte n8 memory and we. Data is stored in a similar way as in the load of unit 4. How to determine how many address and data lines memory has. Byte 0 is fe byte 1 is 01 if these bytes hold a 16bit twos complement int eger, what is its actual decimal value if.